Intel has lifted the lid on Panther Lake, its next Core Ultra Series 3 platform and the firm’s first client chip built on Intel 18A, with high-volume production starting this year at Fab 52 in Arizona and the first SKU slated to ship before end-2025; broader availability is targeted for January 2026. The company also previewed Xeon 6+ “Clearwater Forest”, an 18A server part planned for the first half of 2026. BW Businessworld exclusively attended briefings in Phoenix, Arizona, where Intel detailed the Panther Lake and Clearwater Forest computing architectures, as well as its latest 18A node. It also gave us a tour of Fab 52 at the Ocotillo campus, which is home to what it calls the world’s most advanced semiconductor fab.
“We are entering an exciting new era of computing, made possible by great leaps forward in semiconductor technology that will shape the future for decades to come,” said Intel CEO Lip-Bu Tan. “Our next-gen compute platforms, combined with our leading-edge process technology, manufacturing and advanced packaging capabilities, are catalysts for innovation across our business as we build a new Intel. The United States has always been home to Intel’s most advanced R&D, product design and manufacturing – and we are proud to build on this legacy as we expand our domestic operations and bring new innovations to the market.”
Panther Lake And The Timetable
Intel is pitching Panther Lake at the premium end of the laptop market. Reuters reports that Intel expects the chips to use “30 percent less energy than the prior generation” and that compute and graphics throughput will receive “a 50 percent boost… in some situations”, with laptops “available early in 2026”. The same report notes that Lunar Lake was primarily built at TSMC, underscoring the strategic shift back to an in-house 18A process for Panther Lake; it adds that current Panther Lake yields were not discussed last week, with earlier Reuters reporting putting summer-2025 yields at roughly 10 percent, up from about 5 percent late last year.
Architecture, GPU And Platform AI
Intel’s own description of the platform is concrete. The firm says Panther Lake introduces a scalable, multi-chiplet architecture with up to 16 performance and efficiency cores, a next-generation Arc GPU of up to 12 Xe cores, and a “balanced XPU” design that pushes platform-level AI acceleration to as much as 180 TOPS; it is also bundling a Robotics AI software suite and a reference board so partners can collapse controls and perception on the same SoC for edge robots. “Panther Lake will begin ramping high-volume production this year, with the first SKU slated to ship before the end of the year and broad market availability starting January 2026.”
Spec
| Panther Lake (Core Ultra Series 3)
| Xeon 6+ “Clearwater Forest”
| Intel 18A (process node)
| Architecture
| Multi-chiplet client SoC on 18A; designed for consumer/commercial AI PCs, gaming and edge.
| E-core–only server CPU on 18A; branded “Intel Xeon 6+”.
| First “2-nm-class” node developed and manufactured in the United States.
| CPU configuration
| Up to 16 cores (mix of P-cores and E-cores).
| Up to 288 E-cores.
| N/A
| GPU
| New Arc GPU with up to 12 Xe cores.
| Not disclosed.
| N/A
| AI acceleration
| “Balanced XPU” with up to 180 platform TOPS.
| Not disclosed; focus on throughput/efficiency.
| N/A
| Performance claims
| >50% faster CPU and >50% faster graphics vs previous gen (Intel measurements).
| 17% IPC uplift vs prior gen; “considerable gains” in density, throughput, power efficiency.
| Up to 15% better perf/W and ~30% higher transistor density vs Intel 3.
| Packaging / key technologies
| Benefits from 18A’s RibbonFETand PowerVia; uses Foveros for chiplet stacking/integration.
| Same 18A underpinnings (RibbonFET/PowerVia); server-class implementation.
| RibbonFET (GAA) and PowerVia (back-side power); Foveros 3D packaging.
| Software/edge notes
| Intel Robotics AI software suite + reference board for controls & perception on-device.
| Targeted at hyperscalers, cloud providers and telcos.
| Forms the foundation for at least three upcoming client/server generations.
| Availability
| HVM ramp this year; first SKU before end-2025; broad availability January 2026.
| Launch planned H1 2026.
| Developed/qualified in Oregon; ramping to HVM in Arizona.
| Manufacturing site
| Manufactured at Fab 52 (Ocotillo, Chandler, Arizona).
| Manufactured at Fab 52.
| Fab 52 is the 18A hub; part of Intel’s U.S. expansion.
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Process And Packaging: Intel 18A
The process story is as important as the products it underwrites. Intel 18A—described by the company as “the first 2-nanometer class node developed and manufactured in the United States”—is said to deliver “up to 15 percent better performance per watt and 30 percent improved chip density compared to Intel 3”. Intel adds that the node “was developed, qualified for manufacturing and began early production at the company’s Oregon location and is now ramping toward high-volume production in Arizona”. Those claims rest on the firm’s adoption of RibbonFET gate-all-around transistors and the PowerVia back-side power architecture; Foveros 3D packaging is the glue that enables chiplet stacking and system-level integration.
Servers: Clearwater Forest
On the server side, Clearwater Forest is framed as an efficiency-first Xeon 6+ part built on 18A. Intel discloses up to 288 E-cores and a 17 per cent IPC uplift versus its predecessor, and it is candid about the target audience: “Tailored for hyperscale data centers, cloud providers, and telcos, Clearwater Forest enables organizations to scale workloads, reduce energy costs, and power more intelligent services.” The market launch is planned for the first half of 2026.
Arizona, Fab 52 And The Scale Of The Bet
The Arizona angle is explicit. “Fab 52 is Intel’s fifth high-volume fab at its Ocotillo campus in Chandler, Arizona. This facility produces the most advanced logic chips in the United States and is part of the $100 billion Intel is investing to expand its domestic operations.” In a companion line published this week, the firm states that “Arizona’s Fab 52 is fully operational and set to reach high-volume production using Intel 18A later this year, strengthening U.S. technology and manufacturing leadership.” The spend sits alongside cumulative in-state investment “over $50 billion”, a number Intel highlights in its long-view fact sheet.
Concrete, Steel And Water: The Physical Scale
The physical scale of the build is the sort of thing accountants and engineers both notice. Intel’s Arizona fact sheet notes that a leading-edge fab “takes more than three to five years to build, costs more than $20–25 billion, and requires several thousand construction workers to complete”; that “about 600,000 cubic meters of concrete was poured, plus 75,000 tons of steel reinforcement”; and that “35,000 tons of structural steel was erected”. The document also provides a sense of the site’s plumbing: “Intel has made a significant investment in on-site water treatment and recycling… The 12-acre facility… has the capacity to treat and recycle nine million gallons of water per day.”
Water Stewardship
Water stewardship features prominently in Intel’s public messaging. The company’s Arizona fact sheet states in full: “Intel is water-positive in Arizona. We conserve water within our operations and fund community-based water restoration projects that have restored 1.1 billion gallons of water for Arizona in 2023.”
Yields And Timing
Two caveats hover. First, yields: Intel did not discuss them during the Arizona briefings; risk-production yields cited by Reuters—about 10 per cent in summer—leave little room for complacency. However, Intel also said that, at this point in the ramp, yields on 18A were comparable to those achieved on its previous process nodes—if not better—though it did not disclose figures. The company reiterated that 18A is moving toward high-volume production at Fab 52 in Chandler, Arizona, later this year. Second, timing: Intel says first Panther Lake parts will ship by year-end 2025, with broad availability in January—likely around CES, where major OEMs will announce products based on it—though any slippage that pushes volume later into 2026 would blunt both the headlines and the revenue bump.
Strategic Alliances: The Nvidia Pact
On 18 September 2025, Nvidia and Intel announced a collaboration to co-develop “multiple generations” of custom data-centre and PC products. Nvidia said it would purchase $5 billion of Intel common stock at $23.28 a share, subject to approvals. The joint plan is for Intel to design and manufacture custom x86 CPUs for Nvidia’s AI infrastructure platforms and to build x86 SoCs that integrate Nvidia RTX GPU chiplets for PCs, with the two firms linking their architectures via NVLink. Intel’s chief executive, Lip-Bu Tan, said in the announcement:
“Intel’s x86 architecture has been foundational to modern computing for decades — and we are innovating across our portfolio to enable the workloads of the future. Intel’s leading data center and client computing platforms, combined with our process technology, manufacturing and advanced packaging capabilities, will complement NVIDIA’s AI and accelerated computing leadership to enable new breakthroughs for the industry. We appreciate the confidence Jensen and the NVIDIA team have placed in us with their investment and look forward to the work ahead as we innovate for customers and grow our business.”
Coverage of the deal emphasised its scale and the open questions. CNBC reported Intel shares jumped 22.8 per cent on the news and noted that the investment does not appear to include Nvidia manufacturing at Intel’s foundry at this stage. It also highlighted that Intel would build x86 CPUs for Nvidia’s AI platforms and x86 SoCs with RTX GPU chiplets for PCs.
Competitive Backdrop: Qualcomm’s Snapdragon X2 Elite Extreme
Qualcomm has detailed its second-generation Arm PC silicon, the Snapdragon X2 series, led by the X2 Elite Extreme. Built on a 3nm process, the Extreme SKU scales to 18 Oryon CPU cores with a peak 5.0GHz boost and pairs a new Adreno X2-90 GPU with an 80 TOPS Hexagon NPU that Qualcomm and multiple outlets characterise as the fastest NPU in a laptop today. Qualcomm is claiming up to 31 per cent higher CPU performance at iso-power and up to 43 per cent lower power draw versus the original Snapdragon X Elite, alongside a 2.3× uplift in GPU performance per watt, with devices expected in the first half of 2026.
This is the competitive context into which Panther Lake notebooks will arrive: Arm-based PCs pushing on-device AI budgets and sustained performance, while Intel counters with x86 continuity, higher TOPS at the platform level and a domestic manufacturing story on 18A. It also reflects a divergence in approach to chip architecture. Intel is wagering that much of the AI uplift for high-performance tasks will come via the GPU, which it rates at 120 TOPS of compute, while the 50 TOPS NPU is largely similar in performance to Lunar Lake but significantly shrunk. That shrink—enabled by new process technologies and a refreshed SiP architecture—suggests meaningful efficiency gains.
Intel is clearly taking a “horses for courses” approach, in which different aspects of the SoC on the SiP have been optimised. Distinctly, Qualcomm claims the world’s fastest NPU, which it says is twice as fast as the first-generation Snapdragon X Elite at 80 TOPS. Notably, when Apple announced the A19 Pro chipset for the iPhone 17 Pro, it did not emphasise the Neural Engine (NPU) but rather highlighted AI accelerators in its GPU—precisely the emphasis Intel is making with Panther Lake and, at a higher level, Clearwater Forest.
High-NA EUV: First-Mover Advantage
Intel was the first chipmaker to take delivery of ASML’s High-NA EUV tools and to assemble them on site, installing the first systems at its Oregon development fab. By February 2025, Intel engineers told a conference that two High-NA systems were “in production” at Intel facilities and had processed around 30,000 wafers in a single quarter, with early data indicating the new scanners were more reliable than earlier EUV tools. Reuters has also reported ASML’s shipment of a second High-NA tool and Intel’s intention to deploy High-NA for its 14A generation in the 2026–2027 window.
Architecture And Compatibility
A brief note on architecture. The x86 ecosystem, for all the recent enthusiasm for Arm and RISC-V, remains the substrate for vast amounts of PC and server software—the value of backward compatibility and toolchain continuity is not trivial when migrating to new cores, new nodes and chiplet-first packaging schemes. That, as much as the transistor wizardry, is what gives Intel’s roadmap commercial teeth. |
